index - Equipe Secure and Safe Hardware

 

Dernières publications

Mots clés

Masking countermeasure RSA Machine learning Signal processing algorithms Linearity EMFI Embedded systems Dynamic range Cryptography DRAM Differential power analysis DPA Convolution PUF Field Programmable Gates Array FPGA Internet of Things Reverse engineering Asynchronous Side-Channel Analysis MRAM OCaml STT-MRAM Training Resistance Image processing Magnetic tunnel junction Formal methods ASIC Robustness Defect modeling Coq Elliptic curve cryptography Fault injection CPA Differential Power Analysis DPA Dual-rail with Precharge Logic DPL Intrusion detection Side-channel attacks Power-constant logic GSM Transistors Gem5 Protocols Process variation Side-Channel Attacks Filtering Routing Writing Hardware security Side-channel attack Temperature sensors Logic gates CRT Voltage Countermeasures Estimation Reverse-engineering Simulation AES Security services Costs Neural networks 3G mobile communication FDSOI Reliability Magnetic tunneling Side-channel analysis Authentication Sensors Confusion coefficient Electromagnetic SCA Masking Aging Switches Side-channel attacks SCA Formal proof Fault attacks Computational modeling Randomness Lightweight cryptography Hardware Countermeasure Energy consumption Information leakage Circuit faults Random access memory Security and privacy Fault injection attack SoC Loop PUF Receivers Application-specific VLSI designs FPGA Memory Controller TRNG Mutual Information Analysis MIA Side-Channel Analysis SCA Security Power demand Field programmable gate arrays

 

Documents avec texte intégral

217

Références bibliographiques

435

Open access

41 %

Collaborations